IP RTL Senior Design Engineer

Logic Design, Root Cause Analysis, Infrastructure, Software Development Processes, Drug Injection, Firmware, Quality Assurance, Compliance, Microarchitecture, RTL coding, SystemVerilog, Hiring Practices, Graphics, UVM, Static Timing Analysis, ECC, Failure Analysis, Access Control, Register Transfer Level, Integrated Circuit Design, Corporate Social Responsibility, Intellectual Property, Firewalls, Formal Verification, Semantic Web, Diagnostics, EDA, Verilog, Observability